REPORT SCOPE
INTRODUCTION
For decades, progress in microelectronics has relied on the continued miniaturization of the devices and wiring on silicon wafers in order to increase the processing power and memory density of computer chips. As device dimensions are scaled to smaller and smaller sizes within the nanoregime, a variety of technological and economic problems arise, the rules of classical physics give way to quantum mechanics, and the term molecular- scale ultimately becomes as or more accurate than nanoscale. Extraordinary changes in chip engineering will be required. These changes will necessitate the development of new materials, processing technologies, device structures, and architectures.
In this regime, molecular and nanostructured materials will be combined with existing and emerging processing technologies to fabricate nanoelectronic devices and interconnects that promise continued miniaturization and performance enhancement in nextgeneration memory and logic chips. Various nanomaterials, including carbon nanotubes, semiconductor nanowires, silicon nanocrystals or quantum dots, nanoscale magnetic films, and switchable molecular structures, have emerged as candidates for next-generation nanoelectronic memory and logic devices.
This timely BCC report covers the gamut of emerging nanoelectronic memory and logic devices, including carbon nanotube memories, molecular electronic memories, semiconductor nanowire memories, silicon nanocrystal memories, and spintronic magnetic random access memory (MRAM). Also covered are carbon nanotube and semiconductor nanowire field effect transistors (FETs); quantum dot-based single electron transistors (SETs); molecular electronic switches; and new logic architectures, including programmable logic arrays and quantum dot cellular automata. Quantum computing, a futuristic computing approach that relies on multistate qubits in lieu of binary ones and zeros, is outside the scope of this report.
SCOPE OF STUDY
The report provides:
- Background about trends in semiconductor technology, device scaling challenges and short-term solutions
- A chronology of major events in the nanoelectronics field during the past several decades
- A review of nanomaterials and processing technologies required for next-generation devices and a detailed patent analysis
- Identification and profiles of major and minor players in the
- Coverage of U.S. government, academic, and international research and development efforts.
- Evaluation of the feasibility of the various technologies
- A proposed commercialization roadmap, with market forecasts through 2013.
METHODOLOGY AND INFORMATION SOURCES
The information and analyses contained in this report are based on both primary and secondary sources of information. Over a dozen interviews with participants from industry and academia were conducted by telephone and E-mail, and other information was gleaned from the U.S. Patent and Trademark Office online database, company press releases and websites, and scientific and trade literature.
ABOUT THE AUTHOR
Mindy N. Rittner, Ph.D., the author of this report, has been active in the nanomaterials field for over ten years, initially as a scientific researcher and currently as Director of Nanotechnology Research at BCC. The author of over ten BCC technical-market studies, Dr. Rittner is also the founder and editor of BCC's monthly newsletter, Nanoparticle News, and co-chair of BCC's annual Nanoparticles conference. Prior to working for BCC, Dr. Rittner conducted research on nanostructured aluminum alloys at Argonne National Laboratory. She has a Ph.D. in materials science and engineering from Northwestern University and a B.S.E degree from Princeton University.
