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System-in-Package (SiP) Die Technologies and Global Markets

  • Published: February 2014
  • |
  • Report Code: SMC091A

REPORT HIGHLIGHTS

Global sales for System-in-Package (SiP)-based chipsets totaled nearly $15 billion in 2012. This market is expected to grow at a compound annual growth rate (CAGR) of 6.7% from nearly $16.3 billion forecast for 2013 to $22.5 billion forecast for 2018.

This report provides:

  • An overview of the global market for System-in-Package (SiP) chipsets.
  • Analyses of global market trends, with data from 2012, estimates for 2013, and projections of compound annual growth rates (CAGRs) through 2018.
  • A breakdown of the market along two major criteria; die technologies and end-use applications.
  • A look at many market verticals including telecommunications; medicine; computing and entertainment; consumer electronics, instrumentation and scientific research; energy, defense, and surveillance; and industrial and automotive.
  • Comprehensive profiles of leading companies in the industry.

SAMPLE FIGURE
DOLLAR SALES FOR SIP-BASED CHIPSETS, BY REGION, 2011–2018
($ MILLIONS)
DOLLAR SALES FOR SIP-BASED CHIPSETS, BY REGION, 2011–2018
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Source: BCC Research

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REPORT SCOPE

INTRODUCTION

System-in-package (SiP) is a combination of integrated circuits (ICs) enclosed in a single package or module. Additionally, passive components are mounted on the same substrate. SiP is not just an IC package with multiple dies; it comprises fully functional systems or subsystems in an IC package format.

SiP, while being a packaging technique, differs substantially from other packaging technologies. The latter largely involve minimal complex design considerations, whereas for SiP, an effective subsystem or system, the interconnection and integration are substantially more complex.

SiP brings tangible gains in space reduction. While system-on-chip (SoC) achieves the same objective more effectively, SoC design is more complex and time consuming than SiP. SiP’s simplicity has opened a wide array of uses for it in less than a decade since its inception. However, SiP also faces significant challenges in being able to assure form yield maximization.

This report attempts to weigh the positives of SiP with the negatives in quantitative as well as qualitative contexts.

STUDY GOALS AND OBJECTIVES

This study has the following goals and objectives:

  • Measuring and forecasting the global market size for SiP-based chipsets in value (dollar sales) and volume (shipment sales) terms.
  • Breaking down the market for global SiP-enabled chipsets components along the following end applications in value and volume terms: telecommunications; instrumentation and scientific research; medicine; energy, defense and surveillance; consumer electronics; industrial and automotive; retail; and others.
  • Breaking down individual SiP-enabled chipset end-use applications along the following die compositions in value and volume terms: compound semiconductors and silicon (Si).
  • Breaking down individual SiP-enabled chipset end-use applications along the following regions in value and volume terms: the Americas; Europe, Middle East and Africa (EMEA); and Asia–Pacific (APAC).
  • Breaking down individual SiP-enabled chipset end-use applications along the following countries in value and volume terms: U.S., Brazil, Canada, Mexico, Germany, U.K., France, Italy, Spain, Russia, the Netherlands, Turkey, China, Japan, India, Indonesia and South Korea.
  • Analyzing the stakeholder landscape in the SiP-enabled chipset value chain.
  • Analyzing the patenting activity involving SiP-enabled chipsets.

REASONS FOR DOING THE STUDY

SiP is unique in its ability to combine the principles of electronic circuit design along with that of semiconductor packaging. It is also the only packaging technique that is pitted against SoC, a completely different methodology of integrating multiple functionalities. The simplicity of SiP makes it possible to combine diverse functionalities that SoC cannot cater to.

SiP thus caters to a wide array of uses across application areas. This report is an effort to quantify the market in terms of dollar sales and shipment volumes—a departure from the predominantly service-focused coverage of the semiconductor-packaging market.

SiP-based chipsets are essentially systems or subsystems that combine multiple passive components and active dies. The quantification of such subsystems is not the mainstream tracking mode. Most market studies track the market at individual component level—active or passive. This report quantifies the entire package, which provides new insight into the market dynamics.

This report also sheds light on the challenges and limitations faced by SiP. It also gives due coverage to alternative integration methodologies, such as SoC. This look at the alternatives provides a balance to the report coverage.

Essentially, the report focuses on end-use applications, which can be easily quantified and whose physical attributes can be compared, contrasted, tracked and analyzed.

Each end-use application has its own dynamics, benefits and challenges with respect to levels of adoption of SiP-enabled chipsets. On a larger note, each end-use application has its own market momentum dictated by the health of the regional and country markets. When these aspects are mapped for individual countries, they produce a fascinating collage of local market conditions that add to the larger picture. This report provides a refined view of individual country markets in volume and value terms for 17 key nations spanning all global regions.

SCOPE OF THE REPORT

The report measures and forecasts the size of the market in current U.S. dollars as well as in millions of shipment units for chipsets packaged using SiP.

The report forecasts the market size for the following:

  • Individual end-use application such as telecommunications; instrumentation and scientific research; medicine; energy, defense and surveillance; consumer electronics; industrial and automotive; retail; and others. 
  • The above forecasts are classified in terms of die compositions, geographical regions and countries on volume and value bases; they are also classified in terms of value chain contributors on a value basis.

The Executive Summary provides a snapshot of key findings of the report.

The chapter on theoretical overview of SiP defines SiP and explains its morphology. SiP is placed in the context of other advanced packaging techniques, and a wider view is presented of where semiconductor packaging itself fits in the device-synthesis chain. The chapter dwells on simple and compound semiconductors and elaborates their pros and cons. Further, a high-level view of the SiP market is provided.

The chapter on global markets for SiP-enabled chipsets provides a closer look at the global market for those chipsets. End-use applications are used as the principal classification factor, and individual end-application markets are broken down by region and die composition.

The chapter on regional analysis for the Americas presents an overview of the region and the overall market metrics, followed by analyses of individual major countries such as the U.S., Brazil, Canada and Mexico.

The chapter on regional analysis for EMEA presents an overview of the region and the overall market metrics, followed by analyses of individual major countries such as Germany, France, the U.K., Spain, Italy, Russia, the Netherlands and Turkey.

The chapter on regional analysis for APAC presents an overview of the region and the overall market metrics, followed by analyses of individual major countries such as China, Japan, India, South Korea and Indonesia.

The chapter on major stakeholders and key companies identifies the influential stakeholder categories and leading companies that dominate the market for SiP-based chipsets.

The U.S. Patent Analysis chapter analyzes the U.S. patents granted in the relevant areas of SiP. The chapter classifies the patents awarded according to categories such as: analog–digital converter (ADC), digital–analog converter (DAC), radiofrequency (RF), antenna and other communication-component-specific integration; assembly and integration end-to-end process; bond, resin, solder, interposer and lead frame; design and alignment; die stacking and side-by-side placement facilitation; end-application-specific innovation-data transmission; memory-component-specific innovation; passive component integration; performance testing and verification; and power management, heat sink, inductor and capacitor.

INTENDED AUDIENCE

This report will be relevant to the following audiences:

  • Semiconductor-packaging-service providers, to analyze the relative potency of end-application sectors further broken down by die compositions, geographical regions and key country markets.
  • Semiconductor foundries, to formulate frameworks and standards based on demand for specific end application and die composition.
  • Semiconductor-device makers, to analyze the relative potency of end-application sectors further broken down by die compositions, geographical regions and key country markets; as well as to compare and contrast SiP with SoC.
  • SiP material and packaging-equipment suppliers, to identify the potential of their output across leading SiP end applications.
  • Original equipment manufacturers, to analyze the benefits and prospects of SiP-enabled chipsets used by them in their devices, equipment and products.

METHODOLOGY AND INFORMATION SOURCES

Both primary and secondary research methodologies were used in this study. Industry experts were interviewed as primary sources; secondary sources included industry consortia, individual company financial statements, published opinions and other published sources including technical dissertations.

ABOUT THE AUTHOR

Kaustubha Parkhi has worked in a broad range of functional roles with leading telecommunications operators and service providers such as Reliance Infocomm, Ramco Systems and BPL Cellular. He has written on an array of telecommunications and electronics-related subjects based on his critical analysis of the underlying technology and its business impact. Kaustubha holds a Bachelor of Engineering (equivalent to a Bachelor of Science) in Electronics and Telecommunications and a Master of Business Administration in Systems.

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DISCLAIMER

The information developed in this report is intended to be as reliable as possible at the time of publication and is of a professional nature. This information does not constitute managerial, legal or accounting advice, nor should it be considered as a corporate policy guide, laboratory manual or an endorsement of any product, as much of the information is speculative in nature. BCC Research and the author assume no responsibility for any loss or damage that might result from reliance on the reported information or from its use.

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REPORT TOC

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Pricing on the website is provided for single users and 2-5 users licenses only. All reports will be provided in a PDF format for download. To purchase multi-user licenses, please contact us at (+1)781-489-7301 or send an email to information@bccresearch.com
  Title/Chapter Name Pages Price
System-in-Package (SiP) Die Technologies and Global Markets 173 $6650
Chapter- 1: INTRODUCTION - Complimentary 5 $0
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Chapter- 2: EXECUTIVE SUMMARY 3 $250
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Chapter- 3: THEORETICAL OVERVIEW OF SIP 27 $1557
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Chapter- 4: GLOBAL MARKETS FOR SIP-ENABLED CHIPSETS 26 $1499
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Chapter- 5: REGIONAL ANALYSIS-AMERICAS 20 $1153
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Chapter- 6: REGIONAL ANALYSIS-EMEA 34 $1960
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Chapter- 7: REGIONAL ANALYSIS-APAC 24 $1384
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Chapter- 8: MAJOR STAKEHOLDERS AND KEY COMPANIES 25 $1441
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Chapter- 9: U.S. PATENT ANALYSIS 9 $519
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