Evolving Dielectrics in Semiconductor Devices

Report Highlights

• The semiconductor dielectric materials market in North America is estimated at $107 million in 2005 and will rise at an average annual growth rate (AAGR) of 7.3% to $152 million by 2010.
• The global market will rise from $597 million to $1,012 million in the same time period.
• The market is dominated by inorganics at about 86%, with the rest going to organics and hybrids. This dominance will decrease to around 75% by 2010 as some of the newer organics/hybrids replace conventional materials.
• Semiconductor supply and demand and the technology changes required by modifications to circuit complexity and density will drive sales of equipment associated with dielectric material deposition and processing.

INTRODUCTION

For more than 30 years, silicon dioxide (SiO₂) has been the versatile dielectric “fence” material of choice for the semiconductor device industry. It has provided adequately high-capacitance gate insulation at the front end of the line and sufficiently low-k, crosstalk-free insulation between interconnect wiring levels at the back end. Now, thanks to scaled-down chip components, more densely populated chip real estate, and the introduction of low-resistance interconnect materials like copper, the industry’s familiar, reliable SiO₂ “fencing” no longer is good enough for either application.

Thus, other materials have been developed with lower dielectric constants for interconnect applications and higher dielectric constants for gate or capacitor applications. However, integrating these materials into the wafer and device has brought many challenges that have delayed their introduction. As devices continue to shrink, even lower- or higher-k materials are needed, posing even more integration challenges.

This report analyzes market segments of the semiconductor industry related to development and integration of dielectric materials into the manufacturing process for microprocessors, dynamic memory, and a range of current and emerging technologies, such as system-on-a-chip and silicon-on-insulator. Sectors covered include device manufacturers as well as materials and equipment providers, with company profiles and discussions of future research, development and engineering.

SCOPE OF STUDY

The report contains coverage of:

• Low- and ultra-low-k solutions, including porous and nonporous, organic and inorganic compounds for interlayer and intermetal applications
• High-k candidates, ranging from nitrided silicon oxide through simple metal and rareearth oxides to ferroelectric materials for gate dielectric and super-dense gigabit memory devices
• The cost- and technology-based requirements and the challenge of integration into fabrication processes
• North American and global forecasts for materials by type and region
• Company profiles of major chipmakers, materials suppliers and equipment manufacturers
• U.S., Japanese, and world patents issued since 2000.

METHODOLOGY AND INFORMATION SOURCES

The material presented is based on information gathered from personal contacts with participants within the equipment and materials industry, as well as a thorough review of the technology gathered from technical papers, industry conferences, and Internet searches. The final analyses and projections are based on a combination of a consensus among the primary contacts combined with an understanding of the impact of trends from a historical perspective.

Additional data was obtained from extensive reviews of secondary sources. These include trade publications, trade associations, company literature, and on-line databases. This was done to supplement understanding of applications, markets, and trends in the semiconductor device industry

AUTHOR'S CREDENTIALS

Laurel M. Sheppard is president of Lash Publications International and has a B.S. in ceramic engineering. She has previously authored a number of market reports for BCC and has received numerous editing and writing awards from the Society for Technical Communication and other organizations.